- Doller Joins Nantero’s Growing, World-Class Advisory Board Consisting of Senior Executives Previously with TSMC, Intel, Hitachi, Sony, Apple and More
- NRAM Memory Array Performance and Reliability Validated in Technical Paper by Professor Ken Takeuchi of Chuo University at Next Week’s SSDM 2015 Conference in Japan
WOBURN, MA – SEPTEMBER 24, 2015 – Nantero, the world leader in carbon nanotube electronics, today announced the appointment of renowned memory industry executive Ed Doller to its Advisory Board. Ed was previously VP & Chief Strategist of the NAND Solutions Group at Micron, where he also served as VP & GM Enterprise Storage and as VP & Chief Memory Systems Architect. In addition, Nantero also announced that arrays of its new generation of super-fast, high-density memory (NRAM™) were independently tested by Chuo University and the results showing excellent performance and reliability will be presented in a technical paper at the 2015 International Conference on Solid State Devices and Materials (SSDM).
“Ed Doller’s extensive industry experience and deep understanding at both the memory device level and the system level brings a valuable new dimension to our Advisory Board,” said Greg Schmergel, Co-Founder, CEO and President of Nantero. “As Nantero’s momentum continues to build and we continue working with multiple customers to bring NRAM to market, we are pleased to see independent validation of our memory’s performance by leading experts such as Professor Takeuchi.”
About Mr. Doller
Mr. Doller joined Micron in 2010 via the Numonyx acquisition where he served as VP & Chief Technology Officer after its formation in 2008. Before Numonyx, he spent 15 years at Intel in the Flash memory group where he was appointed its Chief Technology Officer in 2004. Prior to Intel, Mr. Doller spent 9 years at IBM in East Fishkill, N.Y. and held several key positions all in advanced semiconductor memories. He holds multiple patents, is a co-author of the IEEE floating gate standard, and is a frequent keynote speaker at memory conferences.
“Nantero’s next generation NRAM memory has a unique value proposition that is highly attractive for a variety of applications and end-users, especially those ready to consider how a nonvolatile memory with the speed of DRAM can allow them to rethink their systems architectures,” said Ed Doller. “I am excited to join Nantero’s advisory board and become a part of their world-class team that is working in partnership with multiple industry leaders.”
About the SSDM Paper
On Wednesday, September 30th at the SSDM Conference, Professor Ken Takeuchi of Chuo University and several co-authors will be presenting a paper featuring Nantero’s NRAM titled “Investigation of Carbon Nanotube Memory Cell Array Program Characteristics.” Dr. Takeuchi is a Professor at the Department of Electrical, Electronic, and Communication Engineering, Faculty of Science and Engineering of Chuo University, and was previously leading Toshiba’s NAND flash memory circuit design for fourteen years. He designed six world’s highest density NAND flash memory products such as 0.7µm 16Mbit, 0.4µm 64Mbit, 0.25µm 256Mbit, 0.16um 1Gbit, 0.13µm 2Gbit and 56nm 8Gbit NAND flash memories. He holds 210 patents worldwide including 109 U.S. patents. With his invention, “multipage cell architecture”, presented at Symposium on VLSI Circuits in 1997, he successfully commercialized the world’s first multi-level cell NAND flash memory in 2001.
As the world leader in carbon nanotube electronics, Nantero has developed a new generation of memory called NRAM™ (non-volatile random access memory) that can enable a variety of exciting new features and products in both consumer and enterprise electronics. This new super-fast, ultra-high density memory can replace both DRAM and flash in a single chip, or enable new applications as a storage class memory, while also delivering the low power, high speed, reliability, and endurance needed to drive the next wave of electronics innovation. Visit Nantero at www.nantero.com or follow Nantero at Twitter @nantero.
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